ISSCC 2003 / SESSION 19 / PROCESSOR BUILDING BLOCKS / PAPER 19 . 5 19 . 5 A Clock Skew Absorbing Flip - Flop
نویسندگان
چکیده
A new Skew Tolerant Flip-Flop (STFF) that achieves the lowest reported delay and energy-delay product while absorbing up to 54ps of clock skew is described. In addition, a method for characterizing clock skew absorbing flip-flops is presented. This comparison is apples-to-apples because the best previously reported flip-flops [1-4] are fabricated on the same wafer and measured using a common test setup.
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